The Bipolar Junction Transistor — Characteristics and Biasing

By the end you should be able to: Describe the construction and working of a BJT, interpret the CE input and output characteristics, compare the CE, CB and CC configurations, and locate the operating point using a DC load line.

Construction and the one design decision that matters

Three doped regions in sequence: npn or pnp. Three terminals — emitter, base, collector — and two junctions, emitter-base and collector-base.

The three regions are deliberately unequal, and this is the whole trick:

Emitter — heavily doped, to inject plenty of carriers.
Base — very lightly doped and extremely thin, typically under a micrometre.
Collector — moderately doped but physically largest, because it dissipates the most heat.

An npn transistor is not two diodes back to back. Wire two discrete diodes that way and nothing amplifies. What makes a transistor work is that the base is thin enough for carriers injected from the emitter to cross it before they recombine — which two separate diodes, with thick bases, cannot do.

Working (npn, normal active mode)

Bias the emitter-base junction forward and the collector-base junction reverse.

Forward bias makes the emitter inject a large flow of electrons into the base.
The base is thin and lightly doped, so very few find a hole to recombine with — only about 1–5%.
The remaining 95–99% diffuse across and are swept into the collector by its reverse-biased field.

So:

I_E = I_B + I_C

and a small base current controls a much larger collector current. That is the amplification.

Current gains:

\alpha = \frac{I_C}{I_E} \approx 0.95\text{–}0.99, \qquad \beta = \frac{I_C}{I_B} \approx 20\text{–}500

\beta = \frac{\alpha}{1-\alpha}, \qquad \alpha = \frac{\beta}{1+\beta}

Note how sensitive $\beta$ is: $\alpha = 0.98$ gives $\beta = 49$ , while $\alpha = 0.99$ gives $\beta = 99$ . A 1% change in $\alpha$ doubles $\beta$ — which is why $\beta$ varies enormously between nominally identical transistors, and why good circuits are designed not to depend on its exact value.

The three configurations

Named for the terminal common to input and output.

	CE	CB	CC (emitter follower)
Input	base	emitter	base
Output	collector	collector	emitter
Current gain	high ( $\beta$ )	<1 ( $\alpha$ )	high ( $1+\beta$ )
Voltage gain	high	high	<1
Power gain	highest	moderate	moderate
Input resistance	medium (~1 kΩ)	low (~50 Ω)	high (~100 kΩ)
Output resistance	high (~50 kΩ)	very high	low (~50 Ω)
Phase shift	180°	0°	0°

CE is the general-purpose amplifier — the only configuration with both current and voltage gain, hence the highest power gain. Its 180° inversion is characteristic and often the giveaway in an exam question.

CB suits high-frequency work and impedance matching from a low source. CC has no voltage gain at all but transforms a high input impedance to a low output impedance, making it the standard buffer between a weak source and a heavy load.

CE characteristics

Input characteristic — $I_B$ against $V_{BE}$ at constant $V_{CE}$ . It looks exactly like a forward-biased diode curve, knee near 0.7 V, because that is what the emitter-base junction is.

Output characteristic — $I_C$ against $V_{CE}$ for a family of fixed $I_B$ values. Three regions:

Saturation — $V_{CE}$ below about 0.2 V. Both junctions forward biased; $I_C$ rises steeply and is limited by the external circuit, not by $I_B$ . The transistor is fully on.
Active — the curves are nearly flat and horizontal. $I_C \approx \beta I_B$ and barely depends on $V_{CE}$ . This is where amplifiers work, and the flatness is what makes the transistor behave as a controlled current source.
Cut-off — $I_B = 0$ , so $I_C$ is almost zero. Fully off.

The slight upward slope in the active region is the Early effect — increasing $V_{CE}$ widens the collector depletion region and narrows the effective base, so slightly fewer carriers recombine.

Biasing and the DC load line

A transistor amplifies only in the active region, so the DC conditions must place it there before any signal arrives. That placement is biasing, and the resulting DC point is the operating point or Q-point.

Applying KVL round the output loop:

V_{CC} = I_C R_C + V_{CE}

Rearranged, this is a straight line in the $I_C$ – $V_{CE}$ plane — the DC load line. Its endpoints are trivial to find:

Saturation end ( $V_{CE} = 0$ ): $I_{C(sat)} = V_{CC}/R_C$
Cut-off end ( $I_C = 0$ ): $V_{CE(off)} = V_{CC}$

Draw that line across the output characteristics; the Q-point is where it crosses the curve for the actual base current.

Where to place it, and why. For a linear amplifier, put the Q-point near the middle of the load line. That leaves maximum room for the output to swing both ways before it hits saturation at one end or cut-off at the other. A Q-point too near either end clips one half of the waveform — which is distortion, and it is the first thing to suspect when an amplifier output looks flattened on one side.

For a switch, the opposite: drive hard into saturation for on, and into cut-off for off, spending as little time as possible in between.