The Transistor as Switch and Amplifier, RC Coupled Amplifiers and MOSFETs

The transistor as a switch

Use only the two ends of the load line and skip the middle.

• OFF (cut-off). $I_B = 0$, so $I_C \approx 0$ and $V_{CE} \approx V_{CC}$. The transistor looks like an open switch.
• ON (saturation). $I_B$ made large enough that the collector current is limited by $R_C$ rather than by $\beta I_B$. Then $V_{CE(sat)} \approx 0.2$ V — near a closed switch.

Sizing the base drive. Compute the collector current the load demands, divide by $\beta$ to get the minimum base current, then overdrive by a factor of 2 to 10. The overdrive guarantees saturation despite $\beta$ varying between devices and falling with temperature. A switch biased with exactly $I_C/\beta$ will drift out of saturation and start dissipating heat.

Why switching is efficient. Power dissipated is $V_{CE}I_C$. When off, $I_C \approx 0$; when on, $V_{CE} \approx 0.2$ V. Either way the product is small. In the active region both are substantial, which is why a linear regulator runs hot and a switching one does not.

Applications: driving relays, lamps, motors and LEDs; logic gates; and the output stage of every switching supply.

The transistor as an amplifier

Bias into the active region at a mid-load-line Q-point, then superimpose a small AC signal on the base.

A small change in $V_{BE}$ produces a proportionally larger change in $I_C$, which flows through $R_C$ and produces a much larger change in $V_{CE}$. Voltage gain is approximately

The minus sign is the 180° inversion: as $I_C$ rises, the drop across $R_C$ rises, so $V_{CE}$ falls.

The signal must stay small. The transistor is linear only over a limited region; drive it too hard and the output clips at saturation or cut-off.

The RC coupled amplifier

Multiple CE stages joined by a coupling capacitor and driving loads through resistors — the standard multi-stage audio amplifier.

The coupling capacitor does two jobs, and it is worth being clear that they are separate:

1. It passes the AC signal to the next stage.
2. It blocks DC, so each stage keeps its own independently designed bias point. Without it, the collector voltage of one stage would sit on the base of the next and destroy both bias points at once.

Overall gain is the product of the stage gains — or in decibels, the sum:

Frequency response

Plot gain in dB against frequency on a log axis and the curve is flat in the middle and falls at both ends.

Low-frequency roll-off is caused by the coupling and bypass capacitors. Their reactance $X_C = 1/2\pi fC$ rises as frequency falls, so at low frequencies they stop passing the signal.

High-frequency roll-off is caused by junction and stray capacitances in parallel with the signal path, whose reactance falls as frequency rises, shunting signal to ground. The transistor's own gain also falls off.

Mid-band is flat because in that range the coupling capacitors are effectively short circuits and the stray capacitances effectively open circuits.

Bandwidth is measured between the half-power points, where the output power has fallen to half its mid-band value:

Half power corresponds to a voltage ratio of $1/\sqrt2 = 0.707$, which in decibels is

so these are the −3 dB points. That is where the figure comes from, and it is worth knowing rather than memorising: −3 dB is not an arbitrary convention but the definition of half power expressed in a voltage ratio.

Field effect transistors

A BJT is current controlled — base current sets collector current, and the input junction is forward biased, so the input draws current. A FET is voltage controlled: a voltage on an insulated or reverse biased gate creates an electric field that controls the channel, and essentially no gate current flows.

The consequences: FETs have extremely high input impedance (around $10^{12}\ \Omega$ for a MOSFET), are unipolar (only one carrier type conducts), are smaller and easier to fabricate in large numbers, and have no minority-carrier storage to slow them down.

The MOSFET

Metal-Oxide-Semiconductor FET. The gate is separated from the channel by a thin silicon dioxide layer — an insulator. That oxide is why gate current is essentially zero, and also why MOSFETs are so easily destroyed by static: a few tens of volts punctures a layer only nanometres thick, permanently.

N-channel enhancement MOSFET. Source and drain are n-type regions in a p-type substrate, with no channel between them at rest. Apply a positive gate voltage: the field repels holes from the region under the oxide and attracts electrons, and once $V_{GS}$ exceeds the threshold voltage $V_{TH}$ an n-type inversion layer forms, connecting source to drain. Raising $V_{GS}$ further deepens the channel and increases $I_D$. It is normally off.

P-channel enhancement MOSFET. The mirror image: p-type source and drain in an n-type substrate, turned on by a negative gate voltage, conducting by holes.

Since holes have lower mobility than electrons, a p-channel device of the same size conducts less well — which is why n-channel devices are preferred where only one type is needed.

Why both types exist: CMOS. Complementary MOS pairs an n-channel and a p-channel device so that in either logic state one of them is off. Current therefore flows almost only during switching, and static power consumption is nearly zero. That single property is what made large-scale integration possible, and it is why essentially every processor and memory chip is CMOS.